Wednesday, May 16, 2018 | Slides |
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12:30-14:00 | Lunch | |
14:00-15:00 | Joint ASYNC/FAC Keynote Presentation (Session Chair: Andrey Mokhov ) |
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Alex Yakovlev | ||
Async-Analog: Happy Cross-talking? | ||
15:00-15:30 | Coffee break | |
15:30-17:30 | Session 1 (Session Chair: Thomas Ferrère) | |
Maximilian Neuner, Michael Zwerger and Helmut Graeb: Analog Power-Down-Synthesis: Integration into an IC-Design Flow | ||
Justin Reiher and Mark Greenstreet: Combining the MVS Compact MOSFET model with Automatic Differentiation for flexible circuit analysis | ||
Delong Shang, Fei Xia, Xuefu Zhang and Alex Yakovlev: Model-based design of asynchronous controllers for flexible on-chip power buffers | abstract slides |
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Michael Rathmair, Carna Radojicic and Christoph Grimm: In-field Simulation Considering Analog Variability | abstract slides |
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19:30- | Dinner |
Thursday, May 17, 2018 | Slides |
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09:00-10:00 | FAC Keynote Presentation (Session Chair: Dejan Nickovic) |
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Dieter Härle |
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Trends and Challenges in Analog and Mixed-Signal-Verification | slides | |
10:00-10:30 | Coffee break | |
10:30-12:30 | Session 2 (Session Chair: Alexey Bakhirkin) |
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Ramin M. Hasani, Benjamin Kulnik, Dieter Haerle and Radu Grosu: Artificial Intelligence Solutions for Verification of Analog and Mixed-Signal Smart Power Systems | abstract | |
Ahmad Tarraf and Lars Hedrich: Automatic Abstraction of Transistor Level Circuits to Hybrid Automata | abstract | |
Christoph Grimm and Carna Radojicic: Abstraction of real-valued quantities: A coin with more than two sides | ||
Vladimir Dubikhin, Chris Myers and Alex Yakovlev: Model Discovery for Analog/Mixed-Signal Circuits | abstract | |
12:30-14:00 | Lunch | |
14:00-15:30 | Session 3 (Session Chair: Lars Hedrich) |
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Alexey Bakhirkin, Thomas Ferrère and Oded Maler: Towards Fast Parametric Identification for STL | abstract | |
Laura Nenzi, Simone Silvetti, Ezio Bartocci, Luca Bortolussi: A genetic algorithm for learning temporal logic classifiers | ||
David Schreiber and Jürgen Kampe: Complete Performance Space Modeling for Analog IC | abstract | |
15:30-16:00 | Coffee break | |
16:00-17:30 | Session 4 (Session Chair: Christoph Grimm) |
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Jaeha Kim: New Opportunities for Analog Formal Verification with Piecewise-Linear Device Modeling | ||
Nektar Xama, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Anthony Coyette and Georges Gielen: Speeding up Repeated Analog Simulations for Reliability and Testing | abstract | |
Niveditha Manjunath, Mario Heindl, Dieter Haerle, Stephen Sabanal, Herbert Eichinger, Hermann Tauber, Andreas Machne, Christian Manthey, Mikko Väänänen, Radu Grosu and Dejan Nickovic: Production Test Coverage Analysis for Mixed-Signal circuits | ||
End of workshop |